The design cycle of VLSI chips consists of different consecutive steps from high-level synthesis (functional design) to production (packaging). Physical design is the process of transforming netlist into layout which is manufacture-able [GDS]. Physical design process is often referred as PnR (Place and Route) or APR (Automatic Place & Route).
Main Steps in Physical Design are,
- Design setup or import design
- Floorplan
- Placement
- Clock Tree Synthesis (CTS)
- Routing
- Sign Off
- Design setup or import design
- Floorplan
- Placement
- Placement Optimisation
- Clock Tree Synthesis (CTS)
- CTS Optimisation
- Routing
- Routing Optimisation
- Standard Cell Fill
- Metal Fill
- Sign Off
During this process of physical design timing, power, design and technology constraints have to be met. Further design might require being optimized with respect to area, power and performance.
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